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我正在尝试使用Vitis 库中的 BLAS L1 实现,我想将总线宽度设置为 128 位,我正在使用ap_int.h标头来定义ap_int<128>结构。

我用 VITIS HLS 模块实现了一个 OpenCl 内核,但是返回的结果是错误的(它适用于 int32_t* 类型作为输入向量)

#include "ap_int.h"
#include <hls_stream.h>
#include "xf_blas.hpp"


using namespace xf::blas;

extern "C" {

void min_kernel(ap_int<128>* inVec,
                int* resultIndex, // index of the minimal item in the vector
                int p_n)
{
#pragma HLS INTERFACE m_axi port = inVec offset = slave bundle = gmem
#pragma HLS INTERFACE m_axi port = resultIndex offset = slave bundle = gmem

#pragma HLS INTERFACE s_axilite port = inVec bundle = control
#pragma HLS INTERFACE s_axilite port = resultIndex bundle = control
#pragma HLS INTERFACE s_axilite port = p_n bundle = control
#pragma HLS INTERFACE s_axilite port = return bundle = control

        int res;

        hls::stream<WideType<ap_int<128>, 1 << 2> > l_str;
    #pragma HLS data_pack variable = l_str
    #pragma HLS DATAFLOW
        readVec2Stream<ap_int<128>, 1 << 2>(inVec, p_n, l_str);
        amin<ap_int<128>, 2, int>(p_n, l_str, res);
        *resultIndex = res;
}
}

是否有另一种方法来设置总线宽度或定义parallely processed entries- 在amin 函数中?

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