It depends what you mean by "generated". If you really meant "read", then the first step would be to be either to look into the TLB if the address has already been translated or, if your cache supports virtual addresses, to look in the cache itself to see if there is an entry corresponding to that virtual address (and if it belongs to the appropriate process, the virtual address itself is not enough).
If the first step was a virtual to physical translation, then the cache is for physical addresses. Assuming you want to read, then indeed the next step would be to look at the cache.
Yes they do. Most processors using virtual memory use TLB.
Yes, however it depends on your architecture. On an Intel(x86) processor, for instance, the page table pointer is stored into the cr3 register.